ARM Interview questions

• What are the different modes in ARM?

There are 7 modes in ARM.
User           usr
Fast interrupt fiq
Interrupt      irq
Supervisor     svc
Abort          abt
System         sys
Undefined      undThe following two modes are newly added:
Monitor (mon) - With Security Extensions (Secure only)
Hyp     (hyp) - With Virtualization Extensions (Non-secure only)

• Explain about the different modes in ARM.

User mode
The only non-privileged mode.
System mode
The only privileged mode that is not entered by an exception. It can only be entered by executing an instruction that explicitly writes to the mode bits of the CPSR.
Supervisor (svc) mode
A privileged mode entered whenever the CPU is reset or when a SWI instruction is executed.
Abort mode
A privileged mode that is entered whenever a prefetch abort or data abort exception occurs.
Undefined mode
A privileged mode that is entered whenever an undefined instruction exception occurs.
Interrupt mode
A privileged mode that is entered whenever the processor accepts an IRQ interrupt.
Fast Interrupt mode
A privileged mode that is entered whenever the processor accepts an FIQ interrupt.
Hyp mode
A hypervisor mode introduced in armv-7a for cortex-A15 processor for providing hardware virtualization support.

Reference: http://en.wikipedia.org/wiki/ARM_architecture


Explain about the bits in CPSR register.

The individual bits represent the following:

N – Negative result from ALU.
Z – Zero result from ALU.
C – ALU operation Carry out.
V – ALU operation oVerflowed.
Q – cumulative saturation (also described as sticky).
J – indicates whether the processor is in Jazelle state.
GE[3:0] – used by some SIMD instructions.
IT [7:2] – If-Then conditional execution of Thumb-2 instruction groups.
E bit controls load/store endianness.
A bit disables asynchronous aborts.
I bit disables IRQ.
F bit disables FIQ.
T bit – indicates whether the processor is in Thumb state.
M[4:0] – specifies the processor mode


Reference: Cortex-A Series Programmer’s Guide

• What are the differences between fiq and irq?
• How are the arguements passed to sub-routines and how the return value is sent to caller?

Registers R0 to R3 are used to pass arguments to subroutines, and R0 is used to pass a result back to the callers. A subroutine that needs more than 4 inputs uses the stack for the additional inputs.

• Which ARM instruction is used to enter kernel mode from user mode in Linux?

In the case of system calls on ARM, normally the system call causes a SWI instruction to be executed. Anytime the processor executes a SWI (software interrupt) instruction, it goes into SVCmode, which is privileged, and jumps to the SWI exception handler
SVC (formerly SWI)

• How are the arguments and system call number passed while executing SVC instruction (for enter kernel mode from user mode in Linux)?

• What are the registers that are pushed onto stack before executing a subroutine and who will do that?

Sub-routine will do that. At the beginning of the sub-routine, the registers that are going to be modified in the sub-routine code will be pushed on to stack and at the end of the subroutine, the registers that were pushed on to the stack will be popped out.

e.g.
fillmem
     STMFD    sp!, {r0-r2,r4,lr}; save registers
     <sub-routine code>
     LDMFD    sp!, {r0-r2,r4,pc}; restore registers

Also note that, the ARM subroutine call instruction (BL) copies the return address into r14 before changing the program counter, so the subroutine return instruction moves r14 to pc (MOV pc,lr).

• What are the different instructions provided by ARM which are used for performing atomic operations?
• What are memory barriers?
• What are the different memory barrier instructions provided by ARM?
• What is the difference between ARM and Thumb mode?
• How do you determine whether you are in ARM or Thumb mode?
• What is the difference between Thumb and Thumb2?
• What is the difference between dsb, isb and dmb instructions?